In ADSL standards such as T1E1.4 and G.DMT, the 4-QAM modulation scheme is adopted to modulate a pilot tone for carrying timing information from a central office (ATU-C) site to a remote terminal (ATU-R) site, or vice versa. In order to synchronize the ATU-R with ATU-C, for example, ATU-R should lock the carrier's frequency and/or phase in the pilot tone.
A simple approach for an ATU-R site to recovering the clock frequency information delivered by an ATU-C site uses a DPLL with a discriminator as the phase detector to find the phase difference of two consecutive symbols without the need of a complex hardware. FIG. 1 shows the block diagram of such a typical DPLL circuit 10 that comprises a differential phase discriminator 100, a low pass filter, and a voltage controlled crystal oscillator 43. In an ideal case, if the timing is perfectly recovered, the phase difference will gradually decrease to zero. In a practical implementation, however, noises and interference corrupt the clock information carried by the pilot tone. Thus, perfect timing recovery is impossible.
Timing shift compensation is necessary in a differential DPLL as illustrated in FIG. 1 since the quantization error introduced by fix-point operations is one of the noise sources that affect the loop timing recovery. This quantization error introduces timing drift between ATU-C and ATU-R which is not detected by the differential DPLL circuit. After a long period of communication time, the local timing drifts far away from the correct loop timing. In addition, inter-frame interference occurs and no mechanism can correct the timing error. Eventually, link re-initialization or fast retrain may be necessary to reset the link.
In an ADSL system, a 4-QAM signal whose constellation fixes at, for example, (+1, +1) on the two-dimensional signal plane as illustrated in FIG. 2 modulates a pilot tone. Before the ATU-R local clock locking to correct loop timing, the pilot tone phase may rotate. As illustrated in FIGS. 2A and 2B, when the timing is close to synchronization, the phase difference is near zero. However, quantization error due to fixed point numerical operations results in slight phase rotation. The small phase difference can not be detected by the differential phase discriminator 100. The frequency of the voltage controlled crystal oscillator 43 is no longer adjusted in that the differential phase discriminator 100 output is zero. After a period of time, the small phase difference accumulates gradually and results in synchronization failure between ATU-C and ATU-R.
To achieve truly coherent demodulation in conventional approaches, a sample shift operation may be used to compensate for the timing drift as proposed by Minnie Ho and John M. Cioffi in a paper titled “Timing Recovery for Echo-Cancelled Discrete Multitone Systems” in Conference Record of IEEE International Conference on Communications SUPERCOMM/ICC'94, Vol. 1, pp. 307˜310, 1994. The same idea has also been utilized by L. Kiss, et. al., in a paper titled “SACHEM, a Versatile DMT-Based Modem Transceiver for ADSL” in IEEE Journal of Solid-State Circuits, Vol. 34, No. 7, July 1999. This sample shift in time domain introduces a phase jump into each tone of the ADSL receiving system in frequency domain, and this phase jump is proportional to each tone's frequency. Therefore, a phase compensation circuit is needed to properly take care of different phase jumps in tones.
In other approaches, on the other hand, a complicated coherent demodulation method is adopted to extract phase information directly from the pilot tone. The received pilot tone either has to be normalized first and then compared with the expected 4-QAM signal constellations, or its phase angle has to be obtained by an arc-tangent operation. These approaches add considerable hardware cost because both normalization and arc-tangent require relatively complicated numerical operations as compared with other parts in a DPLL circuit.